Founder Profile
Dayananda YS
Founder and CEO.
Design-Verification, Post Silicon Validation, FPGA Implementation.
Design-Verification, Post Silicon Validation, FPGA Implementation.
Founder Profile
Dayananda YS
- Master of Technology from NITK Surathkal - 2002
- Patents : US 2013/0124781 A1 : 16MAY2013
- Generic MLM environment for SoC Performance Enhancement : Best Paper Award : Jun 13, 2013 : SNUG 2012
- Formality an Integral part of ASIC flow : Jun 13, 2010 : SNUG 2010
- Hands on with ASIC Design, Implementation, Low power design